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© 2018 SUNGROW Confidential Hardware-in-the-Loop simulation for grid integrated PV systemsReporter：Yuanze Zhang Date：2018/12/05 1 Contents 2 01 About Sungrow02 Real-time Simulation03 Hardware-in-the-loop (HiL)04 HiL for integrated PV Sungrow Power Supply Co., Ltd. is a key high-tech enterprise in China, who specializes in R&D, production, sales, and service of renewable power supply devices for solar energy, wind energy, and energy storage. It’ s main products include PV inverters, wind converters, energy storage system, electric vehicle drive system, and floaters for floating PV power plants. We also provide first-class solutions for PV power plants.About Sungrow 3 Real-Time Simulation 4 A brief history of digital simulatorsToday’s Power System Real-time Simulation requires: Real-time Simulation High-performanceScalableUpgradableAffordableCOTS-Based Real-time Digital Simulators 5 Real-time simulation Real-time simulation:Simulation time = wall-clock time Fig. (c)Required simulation time real time: simulator operations are not all achieved within the required fixed time-step “overrun”.Offline simulation:Simulation time = wall-clock time• Faster than real-time Fig. (a)• Slower than real-time Fig. (b) 6 Hardware-in-the-loop Simulation 7 8 Hardware-in-the-loop (HiL) simulationRecently, thanks to the availability of computing power required to simulate power system components and power electronics devices in real-time with the accuracy and precision to represent the transient phenomena, a new method for rapid prototyping and testing control units of power electronics devices, named hardware-in-the-loop (HiL) has emerged. A HiL simulation system enables users to connect the actual controller to a real-time simulator via input and output (I/O) ports. The PV plants, power electronics devices and power systems are implemented in the simulator as virtual systems, whereas the controller units that connected to the simulator are actual hardware devices. Hardware-in-the-loop (HiL) simulation 9 Benefits of HiLSave TimeThe tight development schedules cannot afford to wait for available prototypes for embedded system testing. By the time a new converter prototype is available for control system testing, as much as 95% of testing will already have been completed using HIL simulation.Reduce CostFrequently, plants are more expensive and have a higher burden-rate than high-fidelity real-time simulators. With few exceptions, developing and testing while connected to a HIL simulator is far more economical than on a physical plant.Reduce Risk, Increase Safety HIL simulation enables engineers to perform tests that would otherwise endanger physical plants and the people who work in them. Using HIL, engineers can perform even the most dangerous testing scenarios worry-free, thereby enhancing the safe operation of a plant. 10 Australia AEMO requirement: Results obtained from off-site tests or factory tests may be used for model confirmation tests. Another approach adopted by power system equipment manufacturers is Hardware in Loop (HIL) testing to simulated Disturbances well before plant undergoes on-site commissioning and R2 model validation [1]. Benefits of HiL 11 IEEE SCC21/P1547.1 Draft Standard Conformance Test Procedures for Equipment Interconnecting Distributed Energy Resources with Electric Power Systems and Associated Interfaces. HIL testing is under discussion and likely to be included in the new 1547 standard [2].The arrival of faster computing capabilities provides a new and unprecedented opportunity for developers. Now, testing time can be significantly reduced. In parallel, design models can be validated and upgraded using hardware-in-the-loop data, which are quicker and less expensive to collect than field-based experimental data [3]. 12 What can HiL do?HiL for power electronics device controller prototyping, testing and tunning: • Support PV source, wind turbine, battery and machine modelling in Matlab/Simulink• Ideal for fast switching model simulation of power electronics devices• Capable of real-time fault injection and online parameter adjustment • Fast control developing• Control parameter tuning• Controller performance testing• Extreme working condition testingVirtual PV, inverter and grid modelled in real-time simulator Actual DSP ControllerPWMVoltage & current 13 HiL for system level simulation• Multi-core CPU simulation power • Support both average and detailed power electronics device modelling• Precision simulation of controller’s characteristic via encapsulation of control algorithm using dynamic linked library. Large-scale plantsMicro-gridDistributed power generationHVDC• Enables the realisation of power plant controller (PPC) hardware-in-the-loop simulation• Ideal for real-time simulation of large scale power plant, micro-grid, distributed generation and HVDC system What can HiL do? FPGA-Based Simulation 1 4 Real-time simulation speed requirement 15 Requires more serial complex computation power Require simple but parallel fast computation power FPGA simulationTs_CPU = 20 usFPGAAO DI ControllerAI DO30 usReal-Time simulator CPUAO DIControllerAI DO2 usTs_FPGA = 0.5 usReal-Time simulator q CPU SimulationØ Minimum simulation step: 20 usØ Interface latency: 30 usØ Less than 5 kHz switching frequencyq FPGA SimulationØ Minimum simulation step: 0.5 usØ Interface latency: 2 usØ 10~100 kHz switching frequencyU01 + i-Y01 + -g CESW32 Discrete,Ts = 2e-07 s.powergui iY02 +C2 +C1 g CESW01 g CESW05 g CE SW09Cg g CEESW02SW07SW03gC C EESW06 ggC CE ESW10 gSW11 g CESW04 g CESW08 g CESW12 + i -Y03i+ - + Y04+ i -Y05 ++ ++ + g 12SW25 g 12SW26 g 12SW27+ v-Y06+ v-Y07 + v-Y08- v+Y09g CESW34 U01 + i-Y01 + -g CESW32 Discrete,Ts = 2e-07 s.powergui iY02 +C2 +C1 g CESW01 g CESW05 g CE SW09Cg g CEESW02SW07SW03gC C EESW06 ggC CE ESW10 gSW11 g CESW04 g CESW08 g CESW12 + i -Y03i+ - + Y04+ i -Y05 ++ ++ + g 12SW25 g 12SW26 g 12SW27+ v-Y06+ v-Y07 + v-Y08- v+Y09g CESW34 16 FPGA simulationPejovic methodPejovic method replaces switches by either an inductance when conducting or a capacitor when blocking in the nodal matrix. This method is called the fix-Y because the conductance matrix does not change when a switch changes state. When using the modified nodal analysis the main difference between an inductance and a capacitor is in their discretization and in their historical term. Once discretised, the equivalent circuit is a current source with a shunt resistance. 17 For the matrix to remain the same upon switching event, the following equation must remains trueGs = h/L = C/h where h is the time step When building the nodal matrix a value between 10 and 0.001 has to be set to represent a switch. This determines the value of the inductance and the capacitor representing the switch. L=h/Gs C=h× Gs For a time step 100ns and a Gs=1, the switch will be represented by the following inductance and capacitor. L = h/Gs = 100ns/1=100nH C=h × Gs = 100ns× 1=100nF Ideally, you want to have a very small inductor and a very small capacitor to represent a ideal switch. Depending of the circuit topology you might get better result by choosing a different value of Gs [4]. Pejovic methodFPGA simulation 18 HiL For Integrated PV Systems 1 9 HiL experiment bench setup 20q Human & machine interface panelØ Inverter working condition monitoringØ Control parameter setting q Host computerØ Build simulation modelØ On-line parameter adjusting and fault injectionØ Collect simulation dataq Real-time simulatorØ CPU and FPGA simulationØ Analog and digital signal IO Analogue & Digital I/OPWM RS485 q Inverter ControllerØ Provides embedded inverter controlØ Receive analogue signalØ Generate PWM gate drive signal System model in CPU 21q SC Console Subsystem Ø Allows interaction with the system during execution. Ø Runs on host pc asynchronously from the other subsystems. Ø Not linked to a computation node (core). Ø All user interface blocks (scopes, displays, switches, controls, etc) Ø No signal generation nor important mathematical operations q SM Master SubsystemØ Content: All the computational elements of the model, the mathematical operations, the I/O blocks, the signal generators, etc. System model in CPU Real-time parameter setting & fault injection• I/O channel arrangement• FPGA setting • Grid simulator• Data acquisition • PV source model Scopes & measurements 22 SC Console Subsystem q SM Master Subsystem System model in CPU q Console: Ø Online parameter adjustingØ Fault injection q CPU model interface -- slow simulation speed: Ø PV ModelØ Grid Model q FPGA model interface -- fast simulation speed:Ø Inverter 23 Inverter and grid model in FPGA q SG3125 there-level IGBT detailed switching modelØ Detailed switching modelØ Fast simulation step: 1us 24q eHS interface between CPU and FPAG modelØ Arrange PMW channelsØ Set PMW gate propertiesØ Determine FPGA simulation stepsØ Channel Input & output of FPGA modelØ Define the value of Gs HiL simulation results SG3400 LVRT on-site measurement vs. RT-Lab HiL (90% load, 80% dip) SG3400 POC voltage fluctuation on-site measurement vs. RT-Lab HiL 25 HiL simulation results 26 SG3400 LVRT RT-Lab HiL (90% load, 0% dip) SCR = 3 SG3400 HVRT RT-Lab HiL (90% load, 0% dip) SCR = 3 Reference 27 [1] Power System Model Guidelines, AEMO Mar. 2018, available at: https://www.aemo.com.au/ [2] IEEE SCC21/P1547.1 Draft Standard Conformance Test Procedures for Equipment Interconnecting Distributed Energy Resources with Electric Power Systems and Associated Interfaces, Oct. 2016, available at: http://grouper.ieee.org/groups/scc21/1547.1_revision [3] Hardware-in-the-Loop Testing of Utility-Scale Wind Turbine Generators, R. Schkoda, C. Fox, and . H. Clemson University, V. Gevorgian, R. Wallen, and S. Lambert, National Renewable Energy Laboratory, available at: https://www.nrel.gov/docs/fy16osti/64787.pdf [4] eHardware Solver Tutorial, Opal-RT, 2013 THANK YOU! © 2018SUNGROW Confidential28